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MAX2828/MAX2829
Single-/Dual-Band 802.11a/b/g
World-Band Transceiver ICs
Table 18. PA Bias DAC Register
(A3:A0 = 1010)
Table 20. Tx VGA Gain Register
(A3:A0 = 1100)
DATA BIT
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DEFAULT
0
0
0
0
1
1
1
1
0
0
0
0
0
0
DESCRIPTION
Set to 0
Sets PA bias DAC turn-on delay
after TXENA is set high and A3:A0
= 0010, D10 = 1, in steps of 0.5μs.
D9:D6 = 0001 corresponds to 0μs
and 1111 corresponds to 7μs.
Sets PA bias DAC output current in
steps of 5μA. D5:D0 = 000000
corresponds to 0μA and 111111
corresponds to 315μA.
DATA BIT
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DEFAULT
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DESCRIPTION
Not Used. For faster Tx VGA gain
setting, only D5:D0 need to be
programmed.
Tx VGA Gain Control. D5 maps to
digital input pin B6 and D0 maps to
digital input pin B1. D5:D0 =
000000 corresponds to minimum
gain.
Table 19. Rx Gain Register
(A3:A0 = 1011)
PA Bias DAC Register Definition (A3:A0 = 1010)
This register controls the output current of the DAC,
which biases the external PA (see Table 18).
DATA BIT
D13
D12
D11
D10
D9
D8
DEFAULT
0
0
0
0
0
0
DESCRIPTION
Not Used. For faster Rx gain
setting, only D6:D0 need to be
programmed.
Rx Gain Register Definition (A3:A0 = 1011)
This register sets the Rx baseband and RF gain when
A3:A0 = 1000, D12 = 1 (see Table 19).
Tx VGA Gain Register Definition (A3:A0 = 1100)
This register sets the Tx VGA gain when A3:A0 = 1001,
D10 = 1 (see Table 20).
Applications Information
D7
D6
D5
D4
D3
D2
D1
D0
0
1
1
1
1
1
1
1
Rx LNA
Gain
Control
Rx VGA
Gain
Control
Rx baseband and RF
gain-control bits. D6
maps to digital input
pin B7 and D0 maps
to digital input pin B1.
D6:D0 = 0000000
corresponds to
minimum gain.
MIMO Applications
The MAX2828/MAX2829 support multiple input multiple
output (MIMO) applications where multiple transceivers
are used in parallel. A special requirement for this appli-
cation is that all receivers must maintain a constant rela-
tive local oscillator phase, and that they continue to do so
after any receive-transmit-receive mode switching. The
same requirement holds for the transmitters — they should
all maintain a constant relative phase, and continue to do
so after any transmit-receive-transmit mode switching.
This feature is enabled in the MAX2828/MAX2829 by pro-
gramming A3:A0 = 0010, D13 = 1 and A3:A0 = 0101,
D13 = 1. The constant relative phases of the multiple
transceivers are maintained in the transmit, receive, and
standby modes of operation, as long as they are all using
a common external reference frequency source (crystal
oscillator).
Maxim Integrated
37
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相关代理商/技术参数
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MAX2829INT 制造商:Maxim Integrated Products 功能描述:2.4GHZ/5GHZ DUAL-BAND 802.11A/G RF TRANSCEIVE - Rail/Tube
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MAX2830E/D 功能描述:射频收发器 2.4GHz to 2.5GHz 802.11g/b 射频收发器 with PA and Rx/Tx/Diversity Switch RoHS:否 制造商:Atmel 频率范围:2322 MHz to 2527 MHz 最大数据速率:2000 Kbps 调制格式:OQPSK 输出功率:4 dBm 类型: 工作电源电压:1.8 V to 3.6 V 最大工作温度:+ 85 C 接口类型:SPI 封装 / 箱体:QFN-32 封装:Tray
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MAX2830E/W-C8P 功能描述:射频收发器 RoHS:否 制造商:Atmel 频率范围:2322 MHz to 2527 MHz 最大数据速率:2000 Kbps 调制格式:OQPSK 输出功率:4 dBm 类型: 工作电源电压:1.8 V to 3.6 V 最大工作温度:+ 85 C 接口类型:SPI 封装 / 箱体:QFN-32 封装:Tray
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